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      VHDL/Verilog
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38 projects in result set. Projects sorted by: Ranking (Top Ranked First)
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1. A UPF script 2 CPF script converter - upf2cpf is a cool command line tool which will takes in a UPF(Unified Power Format) and will convert it to a CPF(Common Power Format).This tool is very useful for Chip Design Engineers, who want to feed the power related info about the RTL in UPF/CPF.


  • Topic: Electronic Design Automation (EDA)
  • User Interface: Command-line
  • Translations: Korean, German, Japanese, French, Chinese (Simplified)
  • Programming Language: Tcl, VHDL/Verilog, C++
  • Operating System: All BSD Platforms (FreeBSD/NetBSD/OpenBSD/Apple Mac OS X), All 32-bit MS Windows (95/98/NT/2000/XP), Linux
  • License: GNU Library or Lesser General Public License (LGPL), Academic Free License (AFL)
  • Intended Audience: Science/Research, Telecommunications Industry, Information Technology, Developers
  • Development Status: 2 - Pre-Alpha

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2. accellera-vip-interop-library - This library supports interoperability between components written for different verification methodologies such as VMM and OVM. This is maintained by the Accellera Verification Intellectual Property Technical Subcommittee.

Click here to download.  
  • Topic: Simulations, Electronic Design Automation (EDA)
  • User Interface: Other toolkit
  • Programming Language: VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language)
  • License: Apache License V2.0
  • Intended Audience: Science/Research, Information Technology, Telecommunications Industry, Engineering, Advanced End Users, Developers
  • Development Status: 1 - Planning

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3. Blowfish VHDL Core - BlowfishVHDL - free fully synthesizable Blowfish encryption algorithm hardware implementation.

Click here to download.  
  • Topic: Cryptography, Hardware, Mathematics
  • User Interface: Non-interactive (Daemon), Command-line
  • Translations: English
  • Programming Language: VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language), Other, OS Portable (Source code to work with many OS platforms)
  • License: GNU General Public License (GPL), GNU General Public License version 3.0 (GPLv3)
  • Intended Audience: Developers, Science/Research, Telecommunications Industry, Advanced End Users, Aerospace, Government
  • Development Status: 5 - Production/Stable

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4. Cereon - A new 64-bit RISC platform, complemented by a set of development tools, standards specifications and synthesizable VHDL implementations.

Click here to download.  
  • Topic: Emulators, Hardware
  • User Interface: Command-line, Java Swing
  • Programming Language: Assembly, VHDL/Verilog, Java, C++
  • Operating System: OS Portable (Source code to work with many OS platforms)
  • License: Other License, GNU Library or Lesser General Public License (LGPL), GNU General Public License (GPL)
  • Intended Audience: Information Technology
  • Development Status: 2 - Pre-Alpha

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5. CPUptodate - a micro processor 16 bits optimized to hold in a CPLD


  • Topic: Hardware
  • Programming Language: VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language), 32-bit MS Windows (NT/2000/XP)
  • License: Common Public License 1.0
  • Intended Audience: Developers, Education
  • Development Status: 2 - Pre-Alpha

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6. Custom Architecture Generator Tool - Custom Architecture Generator Tool is a software based on the Netbeans Platform, the main purpose is to accelerate the embedded system realisation with a high level description: VHDL code,C2VHDL conversion,Quartus project generation,real time application

Click here to download.  
  • Topic: Other/Nonlisted Topic
  • User Interface: Java Swing
  • Programming Language: VHDL/Verilog, Java, C
  • Operating System: OS Portable (Source code to work with many OS platforms)
  • License: GNU General Public License (GPL)
  • Intended Audience: Science/Research, Information Technology, Telecommunications Industry
  • Development Status: 2 - Pre-Alpha

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7. elphel-community - This is a fork of the Elphel cameras firmware CVS, fully open to contributions from the elphel users and developers community Everyone can submit patches or obtain CVS access for this fork Stable changes will be ported to the main CVS upon approv


  • Topic: Realtime Processing, Linux, Digital Camera
  • User Interface: Web-based
  • Translations: English
  • Programming Language: VHDL/Verilog, C++, C, Unix Shell
  • Operating System: All POSIX (Linux/BSD/UNIX-like OSes), OS Independent (Written in an interpreted language), Linux
  • License: GNU General Public License (GPL)
  • Development Status: 4 - Beta

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8. Engineering tools on OSX - A collection of useful software packages to perform engineering tasks, especially electrical engineering and chip design. All packages come as shrink-wrapped installers for Apple's Mac OS X.

Click here to download.  
  • Topic: Electronic Design Automation (EDA)
  • Programming Language: Ada, C, VHDL/Verilog
  • Operating System: OS X
  • License: GNU General Public License (GPL)
  • Intended Audience: Developers, Science/Research
  • Development Status: 4 - Beta

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9. eWave - Digital waveform viewer/editor. eWave is a visual waveform timing editor compatible with VCD format (with image export possibilities) intended to be used in educational or technological (digital design) purposes. It is distributed as an Eclipse plugin.


  • Topic: Visualization, Editors, Education, Electronic Design Automation (EDA)
  • User Interface: Java SWT
  • Translations: English
  • Programming Language: VHDL/Verilog, Java
  • Operating System: OS Independent (Written in an interpreted language)
  • License: Eclipse Public License
  • Intended Audience: Education, Advanced End Users, Science/Research
  • Development Status: 1 - Planning

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10. FPGADES - This is a simple DES algorithm implemented in FPGA platform. Mainly this system was written by C and interpreted into VHDL.


  • Topic: Symmetric Multi-processing, Algorithms, Cryptography, Data Formats, Streaming
  • User Interface: Non-interactive (Daemon)
  • Programming Language: VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language)
  • License: GNU General Public License (GPL), Academic Free License (AFL)
  • Intended Audience: Telecommunications Industry, Science/Research
  • Development Status: 4 - Beta

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11. Free tools and cores for FPGAs - Tools for FPGA development and IP cores. This project provides tools, cores and documentation to develope FPGA applications. The project focuses on VHDL.

Click here to download.  
  • Topic: Electronic Design Automation (EDA)
  • Programming Language: C, C++, Perl, VHDL/Verilog
  • Operating System: OS Portable (Source code to work with many OS platforms), Linux
  • License: GNU General Public License (GPL)
  • Intended Audience: Developers, Science/Research
  • Development Status: 5 - Production/Stable

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12. FreeCores - FreeCores is a project to provide and foster a place for the sharing and development of hardware designs, in the spirit of freedom, starting with all the Free Hardware cores moved from OpenCores.org, and indexed at FreeCores.org.

Click here to download.  
  • Topic: Electronic Design Automation (EDA), Hardware
  • User Interface: Command-line
  • Translations: English
  • Programming Language: VHDL/Verilog
  • Operating System: OS Portable (Source code to work with many OS platforms)
  • License: GNU General Public License (GPL)
  • Intended Audience: Science/Research, Information Technology, Developers
  • Development Status: 1 - Planning

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13. Grido - An implementation of neural graphs


  • Translations: Persian
  • Programming Language: C#, Java, C++, VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language), J2ME (Java Platform, Micro Edition), Windows Mobile
  • License: GNU General Public License (GPL)
  • Development Status: 1 - Planning

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14. GXSM - A multi-channel image and vector-probe data acquisition and visualization system designed for SPM techniques (STM,AFM..), but also SPA-LEED. A plug-in interface allows any user add-on data-processing and special hardware and instrument support.

Click here to download.  
  • Topic: Hardware Drivers, 3D Rendering, Visualization, Physics
  • User Interface: Gnome, Plugins
  • Translations: English, German, Esperanto
  • Programming Language: C++, C, Python, VHDL/Verilog, Assembly
  • Operating System: Linux, OS X, All POSIX (Linux/BSD/UNIX-like OSes), Fink (Mac OS X), Cygwin (MS Windows)
  • License: GNU General Public License (GPL)
  • Intended Audience: Science/Research, Education, Other Audience, Advanced End Users, Developers
  • Development Status: 6 - Mature

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15. Icarus Verilog - Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.

Click here to download.  
  • Topic: Electronic Design Automation (EDA)
  • User Interface: Command-line
  • Programming Language: C++, C, Yacc, VHDL/Verilog
  • Operating System: All POSIX (Linux/BSD/UNIX-like OSes), OS X, MinGW/MSYS (MS Windows)
  • License: GNU General Public License (GPL)
  • Intended Audience: Developers, Advanced End Users
  • Development Status: 5 - Production/Stable

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16. Inferno C++ to Verilog - Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.


  • Topic: Code Generators, Electronic Design Automation (EDA), Compilers
  • User Interface: Command-line
  • Programming Language: VHDL/Verilog, C++
  • Operating System: OS Portable (Source code to work with many OS platforms)
  • License: BSD License
  • Intended Audience: Science/Research, Information Technology, Developers
  • Development Status: 2 - Pre-Alpha

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17. inter-software interface snippets - xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.


  • Topic: Interface Engine/Protocol Translator, Simulations, Benchmark
  • User Interface: Command-line
  • Programming Language: C, C++, MATLAB, VHDL/Verilog, Unix Shell
  • Operating System: OS Portable (Source code to work with many OS platforms)
  • License: Artistic License 2.0
  • Intended Audience: Engineering, Developers
  • Development Status: 4 - Beta

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18. JPEG Hardware Compressor / Encoder - This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, at a rate of up to 24 images per second (on FPGA Xilinx XC2V1000-4 @ 40 MHz with res. 352x288). License: GPL, that is valid only for NO

Click here to download.  
  • Topic: Still Capture, Graphics, Data Formats, Algorithms
  • Programming Language: VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language)
  • License: GNU General Public License version 3.0 (GPLv3)
  • Intended Audience: Other Audience, Advanced End Users, Aerospace, Telecommunications Industry, Science/Research, Information Technology
  • Development Status: 5 - Production/Stable

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19. Mextram in Verilog-A - Verilog-A Implementation of the Mextram Bipolar Transistor Model

Click here to download.  
  • Topic: Electronic Design Automation (EDA)
  • User Interface: Grouping and Descriptive Categories (UI)
  • Translations: English
  • Programming Language: VHDL/Verilog
  • Operating System: OS Independent (Written in an interpreted language)
  • License: Educational Community License, Version 2.0
  • Intended Audience: Developers
  • Development Status: 5 - Production/Stable
  • Database Environment: Other file-based DBMS

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20. Open WebServo - OpenWebServo is an Open Source Hardware and Software project. Its main goal is to develop a web-controlled servo system. The project includes web application, firmware and hardware design.

Click here to download.  
  • Topic: Conferencing, Hardware, Robotics
  • User Interface: Web-based
  • Programming Language: VHDL/Verilog, Assembly, Java
  • Operating System: All POSIX (Linux/BSD/UNIX-like OSes), All BSD Platforms (FreeBSD/NetBSD/OpenBSD/Apple Mac OS X), All 32-bit MS Windows (95/98/NT/2000/XP)
  • License: GNU General Public License (GPL)
  • Intended Audience: Information Technology, Developers
  • Development Status: 4 - Beta

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38 projects in result set. Projects sorted by: Ranking (Top Ranked First)
Select a page:   1   2   Next

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